Dot clock 20 - 180 MHz at LDVS 8 or 10bit output, 25 - 300MHz(dual link) at TMDS 8bit or 10bit output, supports a wide range.
Features
A
20 - 180MHz dot clock at LVDS 10 bit output, 25 300MHz (Dual Link),
TMDS 10bit output, supports a wide range including broadband.
The
wide range of output modes includes: output 10bit data pattern via
LVDS, output 8bit data pattern after affined transformed to 10bit,
10bit lamp pattern.
Ethernet
and RS-232C have been adopted for external interface. By supporting
Ethernet, the signal generator is now capable of performing batch
control of multiple VG units.
By
mounting an optional board, the Video Signal Generator can support LVDS
4ch output (8bit model, 12 bit model) and a parallel 4ch output (8bit
mode). *The number of boards that can be added is limited to one.
Equipped
with a 1 dot vertical and horizontal display pattern scroll function.
It can also be used to store multiple animation images with respect to
resolution and display by moving a display start coordinate control.
Allows
the user to arbitrarily program an LVDS data array. A user can, in this
manner, cope with specification requiring a test-object display device.
An
ATA compliant Compact Flash Card has been adopted as recording medium.
Program Bitmap data editing can be saved directly to PC without using a
VG.